Ac and dc regulator circuit

ABSTRACT

A circuit for providing a regulated square wave output voltage and a regulated DC output voltage or both. An AC source energizes a switching circuit, having a variable switching rate, which connects a capacitor in voltage clamping relationship to an AC load for both half cycles of the AC voltage thereacross. This switching rate is controlled in accordance with the time accumulation of an electrical quantity, in the present instance the voltage across the AC load. The DC voltage across the capacitor attains a predetermined equilibrium value when the frequency of the AC output voltage is equal to the frequency of the AC source. If the DC capacitor voltage and the AC output voltage derived therefrom deviate from their equilibrium values, as, for example, because of a change in the level of load current, there occur transient changes in the switching rate of the switching circuit which result in changes in the phase displacement between the AC input voltage and the AC output voltage. This phase displacement controls the voltage across an inductor which, in turn, controls the flow of a current which restores the DC capacitor voltage and the amplitude and frequency of the AC output voltage to the desired values while supplying the required power to the AC and DC loads.

United States Patent [72] Inventor Harold J. Brown Lorain, Ohio [21Appl. No. 34,062 [22] Filed May 4, 1970 [45] Patented Apr. 27, 1971 [73]Assignee Lorain Products Corporation [54] AC AND DC REGULATOR CIRCUIT 19Claims, 3 Drawing Figs.

[52] US. Cl 307/12, 321/18, 323/22SC, 323/23, 323/39 [51] Int. Cl H02]3/00, H02m 5/28, H02m 7/20 [50] Field of Search 307/12; 321/18, 25,47,45 (C,ER), 43; 323/16, 19, 22 (SCR), 24, 23, 38, 39, 75 (E) [56]References Cited UNITED STATES PATENTS 3,284,689 11/1966 Rosa 32 l/47X3,309,623 3/ 1967 Depenbrock..... 32 l/43X 3,385,973 5/1968 Abrams et a1323/22SC Primary Examiner-J. D. Miller Assistant ExaminerA. D. PellinenAttorney-John Howard Smith ABSTRACT: A circuit for providing a regulatedsquare wave output voltage and a regulated DC output voltage or both. AnAC source energizes a switching circuit, having a variable switchingrate, which connects a capacitor in voltage clamping relationship to anAC load for both half cycles of the AC voltage thereacross. Thisswitching rate is controlled in accordance with the time accumulation ofan electrical quantity, in the present instance the voltage across theAC load. The DC voltage across the capacitor attains a predeterminedequilibriumivalue when the frequency of the AC output voltage is equalto the frequency of the AC source. If the DC capacitor voltage and theAC output voltage derived therefrom deviate from their equilibriumvalues, as, for example, because of a change in the level of loadcurrent, there occur transient changes in the switching rate of theswitching circuit which result in changes in the phase displacementbetween the AC input voltage and the AC output voltage. This phasedisplacement controls the voltage across an inductor which, in turn,controls the flow of a current which restores the DC capacitor voltageand the amplitude and frequency of the AC output voltage to the desiredvalues while supplying the required power to the AC and DC loads.

Patented A a-i127, 1911 3,576,443

2 Sheets-Sheet 1 INVENTOR.

HAROLD J. BROWN Patented April 27, 1971 2 Sheets-Sheet B vllullllINVENTOR.

HAROLD J. BROWN AC AND nc REGULATOR CIRCUIT BACKGROUND OF THE INVENTIONThe present invention relates to voltage regulator circuits and isdirected more particularly to regulator circuits wherein the AC and DCoutput voltages are maintained at constant predetermined values bycontrolling the phase displacement between the input and output ACvoltage waves.

Prior to the present invention, static circuits for providing aregulated AC output voltage have been of two major types. These includeregulators of the ferroresonant type and switching regulators of thephase controlled type. In circuits of the former-type voltage regulationresults from the action of a shunt tank circuit, including a capacitorand a saturable inductor, on a series inductor. Because the shuntcapacitor must have a high capacitance value to support the load voltageduring each half cycle thereof and because this capacitor must dischargeand recharge with a reversed polarity twice during each AC cycle,circuit losses have been high resulting in poor efiiciency.Additionally, since proper circuit operation is strongly dependent uponmaintaining a predetermined relationship between the inductive andcapacitive reactances of the circuit, the loads to be used therewith hadto berestricted to those having a high-power factor.

In switching regulators of the phase controlled type, regulation isachieved by controlling the conduction of a switch which is in seriesbetween the AC source and the AC load. If the input voltage is low,switching occurs early in each half cycle so that a large fraction ofthe input voltage appears across the AC load. If, on the other hand, theinput voltage is high, switching occurs late in each half cycle toprevent much of the input voltage from appearing across the AC load.While regulator circuits of this type adequately control the magnitudeof the desired AC voltage, they seriously distort the wavefomi of boththe output voltage therefrom and the input current thereto. The latterdistortion can detrimentally affect others using the same power line. Inaddition, because the switching elements are, in effect, connectedacross the line, regulator circuits of the phase controlled type aresubject to misfiring in the presence of AC line voltage transients.

SUMMARY OF THE INVENTION Accordingly, it is an object of the inventionto provide an AC voltage regulator circuit having improved efficiencyand an improved ability to energize low power factor loads.

Another object of the invention is to provide a voltage regulatorcircuit capable of energizing AC loads, DC loads or both.

Yet another object of the invention is to provide an AC voltageregulator circuit having an output voltage waveform which issubstantially independent of the magnitude and power factor of the loadcurrent.

It is another object of the invention to provide an AC voltage regulatorcircuit which causes a corrective voltage to ap pear between theunregulated input voltage and the regulated output voltage, thiscorrective voltage subtracting from the input voltage when the latter ishigher than the desired AC output voltage and adding to the inputvoltage when the latter is lower than the desired AC output voltage.

Still another object of the invention is to provide an AC voltageregulator wherein the voltage across the load is maintainedsubstantially constant during each half cycle of the voltage thereacrossby the clamping activity of a clamping voltage source, such as acapacitor which is charged to a DC voltage, the polarity of theconnections of the clamping voltage source to the load being reversedperiodically by a switching circuit to establish thereacross the desiredAC output voltage.

It is still another object of the invention to provide an AC voltageregulator circuit wherein an unregulated AC source is connected to theAC load through an inductor and wherein quadrature or reactive currentsdrawn by the clamping voltage source induce across the inductor acorrective voltage equal to the difference between the unregulated ACinput voltage and the desired AC output voltage.

time of occurrence'of each control event to be controlled in accordancewith current circuit conditions.

Another object of the invention is to provide a voltage regulatorcircuit wherein the amplitude of the AC output voltage is so related tothe frequency thereof that the former cannot change without changing thelatter and thereby changing the phase displacement between the input andoutput voltages.

It is yet another object of the invention to provide an AC voltageregulator circuit of the above character wherein a change in the phasedisplacement between the input and output voltages which results from adecrease in the peak amplitude of the output voltage from its desiredvalue, causes the flow of a current from the AC source that charges theclamping voltage source and thereby raises the output voltage to itsdesired value.

It is a further object of the invention to provide a voltage regulatorcircuit of the above character wherein the switching circuit whichcontrols the output voltage frequency is controlled in accordance withcontrol signals from a network that senses the time accumulation of anelectrical quantity here shown as the volt-time integral of the ACoutput voltage, the latter network being arranged to produce a polarityreversing control signal each time the volt-time integral attains avoltsecond value equal to the product of the amplitude of the desiredsquare wave output voltage and one-half of the period of the inputvoltage. This condition assures that the output voltage will have thedesired value when the switching circuit causes the output voltagefrequency to be equal to the AC source frequency.

It is yet another object of the invention to provide an AC voltageregulator of the above character for which there exists an equilibriumphase displacement between the input and output voltages for each set ofinput voltages and output currents, this equilibrium phase displacementbeing just sufficient to cause the flow of a current of a magnitudewhich will meet the power demands of the load and at the same time keepthe clamping voltage source charged to the desired value.

It is still another object of the invention to provide a voltageregulator circuit of the above character wherein the rate of change ofcurrent in the inductor is determined by the difference between theinput and output voltages and wherein the phase displacement'between theinput and output voltage is determined by the power requirements of theload.

DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram whichillustrates one embodiment of the voltage regulator circuit of theinvention,

FIG. 2 illustrates voltage and current waveforms which are present inthe circuit of FIG. 1 under no load conditions, and

FIG. 3 illustrates voltage and current waveforms which are present inthe circuit of FIG. 1 under loaded conditions.

DESCRIPTION OF THE INVENTION Referring to FIG. 1 there is shown an ACsource 10, here shown as being of the square wave type, for energizingan AC load lla through the AC voltage regulator of the invention. In thepresent illustrative embodiment, the regulator circuit includes phaseresponsive buffer means here shown in the form of an inductor 13, aclamping voltage source, which here takes the form of a capacitor 14, aswitching circuit 15 and a switching control circuit 15a. As will beseen more fully presently, switching circuit 15 establishes the ACoutput voltage by reversing the polarity of the connection between load11a and capacitor 14 which is charged to a predetermined DC voltage.These reversals are initiated by discrete control events which occur atthe end of discrete output voltagesensing periods. By varying the timingof reversals and, thereby, the phase displacement between the input andoutput voltages, control circuit 15a controls the current which ACsource 10 supplies to meet the operative requirements of AC load 11a andalso the current which AC source 10 supplies to maintain the voltageacross capacitor 14 at a substantially constant, predetermined value.Capacitor 14, in turn, clamps the voltage across the load at the desiredconstant value, during each half cycle of the voltage thereacross, bycharging and discharging through inductor 13 as required to inducethereacross a corrective voltage equal to the instantaneous difference,either positive or negative, between the unregulated AC input voltageand the desired AC output voltage.

To the end that capacitor 14 may charge when the instantaneous value ofthe AC output voltage between terminals 16 and 17 is greater than the DCvoltage across capacitor 14, there are provided first and secondcharging current conducting means 180 and 18b and 19a and 19b,respectively, which here take the form of diodes. When terminal 16 ispositive from terminal 17 by a voltage greater than the voltage acrosscapacitor 14, this capacitor is charged positive on the top by a currentwhich flows from AC source 10, through inductor 13, a conductor 20,diode 180, a conductor 21, capacitor 14, a conductor 22, diode 18b, anda conductor 23. Similarly, when terminal 17 is positive from terminal 16by a voltage greater than the voltage across capacitor 14, the capacitoris charged positive on the top by a current which flows from AC source10 through conductor 23, diode 19a, conductor 21, capacitor 14,conductor 22, diode 19b, conductor 20 and inductor 13. ll

will be seen, therefore, that capacitor 14 serves as a unidirectionalelectrical storage element. Thus, diodes 18a, 18b, 19a and 1%, areconnected in a rectifying bridge configuration having AC input terminals16 and 17 and DC output terminals-24 and 25.

To the end that capacitor 14 may discharge when the instantaneous valueof the AC output voltage between terminals 16 and 17 is less than the DCvoltage across capacitor 14, there are provided first and seconddischarge current conducting means 260 and 26b and 27a and 27b,respectively, which here take the form of thyristors. When terminal 16is positive from terminal 17 by a voltage less than the voltage acrosscapacitor 14, it discharges into AC source 10 through conductor 21, acommutating inductor 28, thyristor 26a, conductor 20, inductor 13, ACsource 10, conductor 23, thyristor 26b, a commutating inductor 29 andconductor 22. Similarly, when terminal 17 is positive from terminal 16by a voltage less than the voltage across capacitor 14, it dischargesthrough conductor 21, inductor 28, thyristor 27a, conductor 23, ACsource 10, inductor l3, conductor 20, thyristor 27b, inductor 29 andconductor 22. Thus, thyristors 26a, 26b, 27a and 27b are connected in aninverting bridge configuration having DC input tenninals 24 and 25 andAC output terminals 16 and 17.

While the diodes of the rectifying bridge conduct whenever they areforward biased, the thyristors of the inverting bridge conduct only whenthey are forward biased and in addition are provided with respectivegate-to-cathode control currents. In the present instance, thegate-tocathode control currents are supplied from switching controlmeans 15:: which will be described more fully presently. A commutatingcircuit including inductors 28 and 29 preferably wound on a common coreand a capacitor 30 operates in the conventional manner to initiateturnoff of the then conducting ducting pair of thyristors whengate-to-cathode control currents are applied to the then nonconductingpair of thyristors. The inverting bridge of FIG. 1 is also provided witha resonant discharge circuit including an inductor 31 and a diode 32.The latter circuit allows capacitor 30 to have a capacitance valuesufficient to assure the proper commutation of the thyristors of theinverting bridge, under conditions where lead 110 has a low powerfactor, without significantly affecting the efficiency of the invertingbridge. This resonant discharge circuit is further described in thecopending application of Harold J. Brown, Ser. No. 880,652 entitledPower Retrieval Circuit for lnverters. Upon turnon, as the voltage of ACsource is first applied to the regulator circuit, a substantial currentflows from AC source 10, through the rectifying bridge, and raises thevoltage across capacitor 14 toward the desired clamping voltage value.At first this current includes only an in-phase component, that is, acomponent which transfers charge from source 10 to capacitor 14 duringsubstantially the entire AC cycle. Later, when the inverting bridgebegins to operate, the in phase component decreases as capacitor 14begins to charge from source 10 during only a portion of each cycle andto discharge into source 10 during the remainder of each cycle. Finally,when the voltage across capacitor 14 reaches the desired value, noin-phase component of current flows and capacitor 14 receives the sameamount of charge during each cycle as it gives up during that cycle.Under these conditions, the current through AC source 10 may be said tobe a reactive or quadrature current because it results in no nettransfer of energy. If, under these conditions, capacitor 14 has asufficiently large capacitance value that the voltage thereacross is notsubstantially changed by the above quadrature current, it will be seenthat the'DC voltage thereacross will remain substantially constant. ThisDC voltage constancy, in turn, assures that the AC output voltage whichis established by reversing the polarity of the connections betweencapacitor 14 and load 11a has a constant amplitude during both halfcycles thereof. Thus, because the circuit of the invention produces aregulated AC voltage from the regulated DC voltage across capacitor 14,it will be seen that capacitor 14 is both a regulated and a regulatingcircuit element.

To the end that the above described AC and DC voltage equilibriumconditions may be achieved, a suitable switching control means a isprovided. ln the present embodiment switching control means 150 includesa transformer 33 having a center-tapped primary winding 34 and aplurality of secondary windings 35c, 35d, 36c and 36d. The latterwindings are connected to the respective gate-cathode control circuitsof thyristors 26a, 26b, 27a and 27b, to control the anode-tocathodeconduction thereof in accordance with the voltage across primary winding34. As will be described more fully presently, control means 15a allowsthe voltage which is established between terminals 16 and 17 by thecontrolled switching activity of the inverting bridge, to shift in phasewith respect to the input voltage, as required, to control the inphasecomponent of current through capacitor 14 in a manner which willmaintain the DC voltage thereacross at the desired constant value.

To the end that the phase relationship between the input and output.voltages may be controlled in accordance with transient changes in theamplitude of the AC output voltage, control means 15a is arranged tosense the volt time integral of the voltage between junctions l6 and 17and to initiate a control event at the end of the sensing period whenthe volttime integral attains a predetermined volt-second value. In thepresent instance this is accomplished by connecting the upper primarywinding section 34a of transformer 33 between junctions 16 and 17through a saturable inductor 37 and conductors 38 and 39 and byconnecting the lower primary winding section 3412 of transformer 33between terminals 16 and 17 through a resistor 40 and conductors 38 and39. This causes the polarity of the voltage across primary winding 34 toreverse each time a voltage of either polarity appears between junctions16 and 17 long enough to establish a predetermined number ofvolt-seconds.

When, for example, junction 16 is positive from junction 17, currentflows from conductor through conductor 38, resistor 40, lower primarywinding section 34b and conductor 39 to conductor 23. This currentrenders the lower end of primary winding 34 positive with respect to theupper end thereof 75 and thereby causes a gatc-to-cathode controlcurrent to flow from windings 35c and 35d to thyristors 26a and 26b,respectively, the conduction of which is associated with the statedpolarity. During this time, the voltage across saturable inductor 37 isequal to the sum of the voltage between conductors 20 and 23 and thevoltage across upper primary winding section 34a. Since inductor 37 cansupport the latter voltages only so long as the flux in the core thereofcan change, it is apparent that, after a predetermined number ofvolt-seconds have elapsed, the core of inductor 37 will saturate to endthe above sensing period. When this occurs, current from conductor 20 toconductor 23 will cease flowing through resistor 40 and begin to flowthrough conductor 38, saturable inductor 37, upper primary windingsection 34a and conductor 39. This will render the upper end of primarywinding 34 positive from the lower end thereof and thereby causegate-to-cathode control currents to flow from secondary windings 36c and36d to thyristors 27a and 27b, respectively.

Under the above conditions, thyristors 26a and 26b will tum off andthyristors 27a and 27b will turn on. This reversal in the conductivestates of the thyristors reverses the polarity of the connectionsbetween capacitor 14 and junctions l6 and 17, and, thereby, reverses thepolarity of the voltage between conductors 20 and 23. At this time thecore of saturable inductor 37 is still saturated but the reversedvoltage begins to drive it towards saturation in the opposite directionthus beginning a fresh sensing period with a core which is reset to apredetermined initial condition. Additionally, current will begin to'flow upwardly through conductor 39, lower primary winding section 34b,resistor 40 and conductor 38 to maintain the reversed polarity onprimary winding 34. It will be understood that any device such as, forexample, an operational amplifier, which can be adapted to produce anoutput signal after a predetennined number of volt-seconds have elapsed,can be utilized in place of the magnetic structure described above.

ln view of the foregoing, it will be seen that switching control network150 senses the voltage between terminals 16 and 17 and reverses theconductive states of the thyristors each time a predetemiined number ofvolt-seconds have elapsed. Since the instantaneous AC voltage betweenjunctions l6 and 17 is substantially constant during each half cycle andis substantially equal in magnitude to the DC voltage across capacitor14, it is apparent that the switching rate of thyristors of theinverting bridge will be proportional to the DC voltage across capacitor14. Thus, an increase or decrease in the voltage across capacitor 14will be accompanied by a proportional increase or decrease,respectively, in the rate at which the thyristors reverse states and,therefore, in the frequency of the output voltage between terminals 16and 17.

The number of volt-seconds required to initiate a reversal in thepolarity of the output voltage may accumulate rapidly if the outputvoltage is high during the sensing period separating polarity reversals,or may accumulate slowly if the output voltage is low during the sensingperiod, or may accumulate slowly during part of the sensing period andrapidly during other parts thereof where variations in voltage occurduring a given sensing period. The control circuit 15a acts only inresponse to the accumulated effect of the output voltage at the end ofthe entire sensing period and is not affected by those extraneousvoltage variations (e.g. ripple voltage) which occur within the sensingperiod but do not reflect the amplitude of the desired square wavecomponent of the AC output voltage. Therefore, it is unnecessary tofilter out the extraneous voltages before determining how the amplitudeof the actual output voltage compares with the desired output voltage.As a result, the time constants associated with sensing the outputvoltage through a filter circuit are eliminated thus improving thedynamic response of the regulator circuitry.

The dynamic response of the circuit of the invention is also improvedbecause the information received by control circuit 15a during eachdiscrete sensing period is discarded when the polarity of the voltageacross terminals 16 and 17 reverses at the end of that sensing period.This is because the resetting of the control circuit 15a allows thiscircuitry to exercise its independent judgment as to the optimum timefor the next polarity reversal to occur, in the light of the thenvolt-second information accumulated since the last polarity reversal.This activity takes place uninhibited by circuit conditions whichexisted before the'last polarity reversal since they have been wiped outby resetting.

The manner in which the above described voltage-frequency relationshipresults in the establishment and maintenance of the desired AC outputvoltage will now be described. As the voltage across capacitor 14 risesafter turnon due to the flow of the in-phase current, the thyristorswitching rate will rise toward the frequency of AC source 10. Assumingthat no load is connected between terminals 16 and 17, the voltagebetween the latter terminals will, at this time, be lagging the voltageof source 10 but will be advancing in phase toward the latter as theswitching rate increases. The difference between these voltages appearsacross phase responsive buffer means 13. l have found that the abovephase lag controls the flow of the in-phase component of current fromsource 10 which charges capacitor 14 and thereby increases the thyristorswitching rate. Consequently, as the thyristor switching rate increasesand thereby reduces the phase lag between the AC input and AC outputvoltages, the in-phase component of current which allows the frequencyto increase is choked off by phase-responsive buffer means 13. Thischoking activity is reflected by a decrease in the voltage across phaseresponsive buffer means as the phase displacement between the input andoutput voltage decreases.

Neglecting circuit losses, the thyristor switching rate will be seen toincrease until the AC output voltage advances into phase with the ACinput voltage. Under the latter conditions there is no phase'lag tosupport the in-phase current required to further increase the capacitorvoltage and thyristor switching rate. During operation, if the capacitorvoltage and thyristor switching rate attempt to fall from the abovevalues, the phase lag will once again appear and initiate an in-phasecomponent of current which will return both the capacitor voltage andthe thyristor switching rate to the values from which they attempted tofall. Thus, because of the phaseresponsive characteristics of inductor13, the AC output voltage and AC output frequency are in equilibriumwhen the output frequency is equal to the frequency of source 10.

If circuit losses are not neglected, the thyristor switching rate willincrease until the frequency of the output voltage is equal to thefrequency of source 10, as before, but the output voltage will lag theinput voltage by a residual phase angle. This residual phase lag isnecessary to support that value of inphase current through therectifying bridge which will just supply the losses of switching circuit15 and capacitor 14. Under these conditions, there is no excess in-phasecurrent available for further increasing the output voltage andfrequency. Additionally, if the output voltage and frequency attempt tofall from the above values, the above phase lag will increase andthereby cause an increase in the in-phase current which will restore thecapacitor voltage and the AC output voltage and frequency to the valuesfrom which they attempted to fall. Thus, the AC output voltage andoutput frequency can be in equilibrium when the output frequency isequal to the frequency of source 10, even if the output voltagecontinually lags the input voltage.

Since the DC voltage across capacitor 14 is maintained at apredetermined, substantially constant value, it will be seen that a DCload 11b connected thereacross will be provided with a regulated DCoutput voltage. A load so connected does not disrupt the normal activityof the regulator circuit because the power required by such a DC load issupplied by an increase in the above discussed in-phase component ofcurrent which flows from AC source 10 through the rectifying bridge.Thus, the power drawn by the added DC load is treated in the same mannerby the invention as are the losses in the switching circuit 15. Thus,the circuit of the invention can provide a regulated DC voltage to a DCload 11b at the same time it provides a regulated AC voltage to ACload11a.

It will be understood that if the AC source 10 is connected to theregulator circuitry of the invention through a transformer, a magneticshunt between the primary and secondary windings thereof may introducesufficient leakage reactance between source 10 and switching circuit Ito eliminate the need for a discrete inductor such as inductor 13. Thisis because a leakage reactance-type transformer is the electricalequivalent of a transformer in series with an inductor. A leakagereactance transformer'is further described in my US. Pat. No. 2,29 I,069 entitled Inverter Circuit.

In the present embodiment, control circuit 150 is so designed that, whenthe above described frequency equilibrium condition exists, the voltageappearing between junctions l6 and 17 has the desired amplitude. This isaccomplished by selecting a saturable inductor which, when used with thecircuitry of FIG. 1, will initiate a polarity reversal when the volttimeintegral of the AC voltage between terminals 16 and 17 is equal to theproduct of the amplitude of the desired square wave output voltage and atime equal to one-half of the period of the input voltage. This assuresthat when the period of the AC output voltage is equal to the period ofthe AC input voltage (frequency equilibrium) the AC output voltage willhave the desired amplitude.

Referring to FIGS. 20, 2b, and 2c there are shown the noload voltage andcurrent waveforms present within the regulator circuit under high line,nominal line and low line conditions, respectively, if circuit lossesare neglected. Under the high line conditions shown in FIG. 2a, theamplitude of the AC input voltage E exceeds the desired amplitude of theAC output voltage E Since the latter voltages are disposed in seriesaround the closed loop including AC source 10, buffer means 13,conductor 20,junctions l6 and 17 and conductor 23, it is apparent thatthe difference between the latter voltages must appear somewhere in theloop if the output voltage is to remain constant. In the presentinstance, the difference volt age is made to appear across buffer means13 by the voltage clamping activity of capacitor I4. When this clampingactivity occurs, capacitor 14 charges when the voltage between junctions16 and 17 attempts to rise above the capacitor voltage and dischargeswhen the voltage between junctions I6 and 17 attempts to drop below thecapacitor voltage. These charge and discharge currents together comprisea quadrature current which flows through buffer means I3 and inducesthereacross a voltage equal to the voltage difference between the inputand the output voltages. Because capacitor 14 can change its charge ordischarge rates as necessary to give rise to any waveform of differencevoltage, it will be seen that the waveform of the input voltage has noeffect on the waveform of the output voltage.

Thus, inductor 13 which here serves as phase-responsive buffer meansdevelops a compensatory voltage in response to the flow of quadraturecurrent therethrough when the AC input voltage is unequal to the ACoutput voltage and chokes off the flow of excess in-phase currenttherethrough when the phase displacement between the input and outputvoltages is diminishing. The former activity employs the buffer propertyof the inductor I3 and the latter activity employs the phaseresponsiveproperty thereof. As a result of both of the above activities, theinvention assures a high degree of regulation of both the AC and the DCoutput voltages in the face of wide variations which may occur in the ACinput voltage and the AC or DC output currents.

Under the conditions shown in FIG. 2a, the input and output voltages arein-phase square waves and the difference between them is constant duringeach half cycle. To induce this difference voltage across inductor l3,capacitor M causes the current therein to change at a constant rateduring each half cycle, the sign of this rate of change being such thatthe voltage across inductor l3 subtracts from the voltage across ACsource during both half cycles. Because only the AC voltage differencebetween the input and output voltages appears across inductor 13, it isapparent that no DC level of current can flow therethrough. Thus, thecurrent through inductor 13 changes linearly during each half cycle andis symmetrical about the abscissa A of the current-time plot as shown bycurve I, in FIG. 2a.

It will be understood that if the difference E between the input andoutput voltages E and E respectively, should increase or decrease fromthe value shown in FIG. 2a, the rate of change and, therefore, the peakamplitude of the current established in inductor 13 by the clampingactivity of capacitor 14 will change accordingly to maintain the newdifference voltage across inductor I3. It will be seen that the largerthe capacitance of the capacitor 14 the smaller will be the ratio orpercentage of the AC ripple voltage thereacross to the DC voltagethereacross. A capacitor of such magnitude is permissible in the circuitof the present invention because the circuit of the invention performsits assigned function without requiring any reversal in the polarity ofthe voltage of capacitor 14 at any time. Accordingly, capacitor 14 mayhave a capacitance value sufficiently large that the DC voltagethereacross remains substantially constant as the extreme values ofcharge and discharge currents flow therethrough.

Under the nominal line conditions shown in FIG. 2b, the input voltage issubstantially equal to the output voltage and, neglecting circuitlosses, is in-phase therewith. Since there is no difference between theinput and output voltages, it will be seen that capacitor 14 need notcharge or discharge to maintain a changing current through inductor 13.Thus, FIG. 2b shows inductor current 1,, to be zero.

Under the low line condition shown in FIG. 20, the input voltage E, isless than the output voltage E by a constant voltage during each halfcycle. To induce this difference voltage across inductor I3, capacitor14 causes the current therein to change at a constant rate during eachhalf cycle, the sign of this rate of change being such that the inductorvoltage adds to the voltage across AC source 10 during both half cycles.Under these conditions, the inductor current I has the waveform shown inFIG. 2c.

In comparing the phase relationships between the above describedcurrents and the corresponding input and output voltages, it is apparentthat if circuit losses are neglected, the power given up or received by.source 10 in the first half of each half cycle is equal to the powerreceived or given up, respectively, by source 10 in the second half ofeach half cycle. Consequently, it is apparent that the above describedcurrent through inductor 13 is a reactive or quadrature current.

From the foregoing, it will be seen that the output voltage ismaintained at the desired value by the voltage clamping activity ofcapacitor 14, this activity manifesting itself in the maintenance of aquadrature current through inductor 13. It will further be seen thatcapacitor M can alter the magnitude, phase and waveform of thequadrature current as necessary to achieve the desired output voltageregulation manifested by voltage constancy.

If, under the above conditions, a resistive or unity power factor loadis connected between junctions 16 and 17, the voltage across capacitor14 will tend to drop. This is because the output voltage is in phasewith the input voltage thus preventing the flow of an in-phase or energytransferring com ponent of current from source 10 to AC load Ila.Initially, therefore, the load current must be supplied by capacitor 14with a resultant drop in the voltage thereacross. Because controlcircuit15a relates the voltage across capacitor 14 to the thyristor switchingrate, the capacitor voltage drop is accompanied by a proportional dropin the output voltage frequency. This frequency drop, in turn, causesthe output voltage to lag behind the input voltage and thereby initiatethe previously described in-phase current component from source 10. Onceinitiated, the latter current not only supplies the energy required bythe load but also supplies the current required to recharge capacitor I4to its equilibrium voltage. Thereafter, as the voltage across capacitor14 and the thyristor switching rate return to their equilibrium values,there remains that por' tion of the phase lag between the input andoutput voltages which is necessary to maintain an in-phase component ofcurrent to supply the load and the regulator circuit losses. Thus, a newequilibrium condition is attained with the output voltage lagging behindthe input voltage by an angle dependent upon the circuit powerrequirements.

lf the added load is only partially resistive, the quadrature orreactive component of the current through load 110 will be supplied bycapacitor 14 through the rectifying and inverting bridges showncollectively at 15 and the in-phase or power component of load currentwill be supplied from AC source in the manner described above. From theforegoing, it will be seen as the regulator circuit of the invention isloaded, there occurs a change in the phase displacement between theinput and output voltages which allows the transfer of the requiredpower. This phase displacement is the result of a momentary change inthe thyristor switching rate which is, in turn, brought about by anattempted change in the voltage across capacitor 14.

if the input voltage and the current requirements of AC load 110 shouldchange at the same time, the quadrature current drawn by the capacitorthrough inductor 13 will change, as required, to maintain the outputvoltage substantially at the desired level. In addition, control circuit15a will shift the phasebetween the input and output voltages, asnecessary, to produce the in-phase component of source current which isnecessary to supply the power requirements of load 11a and the losses inthe regulator circuit of the invention. The above in-phase current is,of course, in addition to any in-phase component of current flowingthrough inductor 13 because of DC load 11b.

The voltage and current wavefonns which are present after an equilibriumstate is achieved under the above conditions are shown in FlG. 3.Therein, the output voltage E has a smaller amplitude than the inputvoltage E and lags therebehind by an angle determined by the requiredload current. It

will be seen that the rate of change of the inductor current, as

indicated by the degree of slope in H0. 3, is proportional to theinstantaneous difference between E and E and that the inductor current1, includes a component which is in phase rent will flow throughswitching circuit 15 while the in-phase component thereof flows throughAC load lla.

It will be understood that other forms of inverter and rectifiercircuits may be utilized to attain the objectives of the invention. Thefunctions of a switching circuit 15 may be served by any suitableinverter circuit which provides for a bidirectional exchange of energybetween its DC input and its AC output.

In view of the foregoing, it will be seen that an AC circuit constructedin accordance with the invention provides both a regulated AC outputvoltage and a regulated DC output voltage for a wide range of AC inputvoltages both above and below the desired AC output voltage and thatthis is accomplished without the use of power dissipating series circuitelements, by controlling the quadrature current drawn by a voltageclamping source. it will further be seen that the circuit of theinvention maintains the AC and DC output voltages at the desired valuefor a wide range of amplitudes and power factors of output current andthat this is accomplished by controlling the phase displacement betweenan AC input voltage and a clamped AC voltage derived therefrom.

It will be understood that the embodiment shown herein is forexplanatory purposes only and may be changed or modified withoutdeparting from the spirit and scope of the appended claims.

lclaim:

1. In a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, phase responsivebufier means for developing a compensatory voltage in response to a flowof quadrature current therethrough and for choking off the flow ofexcess in-phase current therethrough when the phase displacement betweenthe input and output voltages is diminishing, load circuit means, meansfor connecting said phase responsive buffer means and said load circuitmeans in series relationship across the source of AC input voltage, achargeable source of clamping voltage, means for conducting a chargingcurrent through said clamping voltage source when the instantaneous ACvoltage across said load circuit means is greater than the voltageacross said clamping voltage source, means for conducting a dischargingcurrent from said clamping voltage source when the voltage across saidclamping voltage source is greater than the instantaneous AC voltageacross said load circuit means, means for connecting said clampingvoltage source across said load circuit means through said chargingcurrent-conducting means, means for connecting said clamping voltagesource across said load circuit means through said dischargecurrentconducting means and means for controlling the conductivity ofsaid discharge current-conducting means in accordance with the volt-timeintegral of the voltage across said load circuit means.

2. An AC voltage regulator as set forth in claim 1 in which saidchargeable voltage-clamping source comprises a capacitor.

3. In a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, phase-responsivebuffer means for developing a compensatory voltage in response to a flowof quadrature current therethrough and for choking off the flow ofexcess in-phase current therethrough when the phase displacement betweenthe input and output voltages is diminishing, load circuit means, meansfor connecting said phase-responsive buffer means and said load circuitmeans in series relationship across the source of AC input voltage,unidirectional electrical storage means, switching means for conductingcharging current through said storage means when the instantaneous ACvoltage across said load circuit means attempts to rise above thevoltage across said storage means and for conducting discharging currentfrom said storage means when the instantaneous AC voltage across saidload circuit means attempts to fall below the voltage across saidstorage means, means for connecting said storage means in voltageclamping relationship across said load circuit means through saidswitching means, means for controlling the discharging activity of saidswitching means in accordance with the volt-time integral of the voltageacross said load circuit means.

4. A voltage regulator circuit as set forth in claim 3 in which saidcontrolling means includes a transformer having centertapped primarywinding means and secondary winding means, means for connecting thecenter tap of said primary winding means to one end of said load circuitmeans, saturable inductance means, resistance means, means forconnecting one end of said primary winding means to the other end ofsaid load circuit means through said saturable inductance means, meansfor connecting the other end of said primary winding means to said otherend of said load circuit means through said resistance means, means forconnecting said secondary winding means in control relationship to saidswitching means.

5. A voltage regulator circuit as set forth in claim 3 wherein saidcontrolling means senses the output voltage during discrete sensingperiods, each of said discrete sensing periods being measured by apredetennined number of volt-seconds.

6. in a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, phase-responsivebuffer means for developing a compensatory voltage in response to a flowof quadrature current therethrough and for choking off the flow ofexcess in-phase current therethrough when the phase displacement betweenthe input and output voltages is diminishing, load circuit means, meansfor connecting said phase-responsive buffer means and said load circuitmeans in series relationship across the source of AC input voltage,unidirectional electrical storage means, rectifying means having ACinput means and DC output means, means for connecting the AC input meansof said rectifying means across said load circuit means, means forconnecting said storage means across the DC output means of saidrectifying means, inverting means having DC input means and AC outputmeans, means for connecting said storage means to the DC input means ofsaid inverting means, means for connecting the AC output means of saidinverting means across said load circuit means, means for sensing thevolt-time integral of the voltage across said load circuit means andmeans for connecting said sensing means in switching controlrelationship to said inverting means.

7. In a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, phase-responsivebuffer means for developing a compensatory voltage in response to a flowof quadrature current therethrough and for choking off the flow ofexcess in-phase current therethrough when the phase displacement betweenthe input and output voltages is diminishing, load circuit means, meansfor connecting said phase responsive buffer means and said load circuitmeans in series relationship across the source of AC input voltage,unidirectional electrical storage means, unidirectional conducting meansfor connecting said storage means in voltage-clamping relationshipacross said load circuit means when the instantaneous voltage acrosssaid load circuit means attempts to rise above the voltage of saidstorage means, controllable conducting means for connecting said storagemeans in voltage clamping relationship across said load circuit meanswhen the instantaneous voltage across said load circuit means attemptsto fall below the voltage of said storage means, means for controllingsaid controllable conducting means in accordance with the volt-timeintegral of the voltage across said load circuit means to preventchanges in the peak amplitude of the voltage across said load circuitmeans independently of proportional changes in the frequency thereof.

8. In a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, phase-responsivebuffer means for developing a compensatory voltage in response to a flowof quadrature current therethrough and for choking off the flow ofexcess in-phase current therethrough through when the phase displacementbetween the output and input voltages is diminishing, load circuitmeans, means for connecting said phase-responsive buffer means and saidload circuit means in series relationship across the source of AC inputvoltage, unidirectional electricai storage means, a switching circuithaving DC input terminals and AC output terminals and being arranged toestablish a clamped AC voltage across said load circuit means duringboth half cycles of the AC voltage across said load circuit means, meansfor connecting the AC output terminals of said switching circuit acrosssaid load circuit means, means for connecting said storage means acrossthe DC input terminals of said switching circuit, said switching circuitbeing arranged to provide a bidirectional exchange of energy between theDC input temtinals thereof and the AC output terminals thereof, meansfor controlling the rate of switching of said switching circuit inaccordance with the volt-time integral of the voltage across said loadcircuit means.

9. An AC voltage regulator as set forth in claim 8 in which saidswitching circuit includes a plurality of controllable conducting means,said controllable conducting means being connected in an invertingbridge configuration having DC terminal means and AC tenninal means,commutating inductance means, means for connecting said commutatinginductance means between the DC terminal means of said inverting bridgeand the DC input terminals of said switching circuit, commutatingcapacitance means, means for connecting said commutating capacitancemeans between the AC terminals of said inverting bridge, means forconnecting the AC terminals of said inverting bridge to the AC outputterminals of said switching circuit, discharge inductance means,unidirectional conducting means for connecting said discharge inductancemeans between the DC terminals of said inverting bridge, a plurality ofunidirectional conducting means, said unidirectional conducting meansbeing connected in a rectifying bridge configuration having AC terminalmeans and DC terminal means, means for connecting the AC terminal meansof said rectifying bridge to the AC output terminais of said switchingcircuit and means for connecting the DC terminal means of saidrectifying bridge to the DC input terminals of said switching circuit.

10. An AC voltage regulator as set forth in claim 8 in which saidunidirectional electrical storage means comprises a capacitor.

117 In a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, phase-responsivebuffer means for developing a compensatory voltage in response to a flowof quadrature current therethrough and for choking off the flow ofexcess in-phase current therethrough when the phase displacement betweenthe input and output voltages is diminishing, load circuit means, meansfor connecting said phase-responsive buffer means and said load circuitmeans in series relationship across the source of AC input voltage, achargeable clamping voltage source, first unidirectional conductingmeans for conducting charging current through said clamping voltagesource when the voltage across said load circuit means has a firstpolarity, second unidirectional conducting means for conducting chargingcurrent through said clamping voltage source when the voltage acrosssaid load circuit means has a second polarity, first controllableconducting means for conducting discharge current from said clampingvoltage source when the voltage across said load circuit means has afirst polarity, second controllable conducting means for conductingdischarge current from said clamping voltage source when the voltageacross said load circuit means has a second polarity, means forconnecting said clamping voltage source across said load circuit meansthrough said conducting means, means for sensing the volt-time integralof the voltage across said load circuit means, means for connecting saidsensing means in conduction control relationship to said first andsecond controllable conducting means, said sensing means being adaptedto reverse the conductive states of said controllable conducting meanseach time the volt-time integral of the voltage across said load circuitmeans attains a volt-second value equal to the product of the amplitudeof the desired square wave voltage across said load circuit means and atime equal to one-half of period of the AC input voltage.

12. In a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, phase-responsivebuffer means for developing a compensatory voltage in response to a flowof quadrature current therethrough and for choking off the flow ofexcess in-phase current therethrough when the phase displacement betweenthe input and output voltages is diminishing, load circuit means, meansfor connecting said phase-responsive buffer means and said load circuitmeans in series across the source of AC input voltage, unidirectionalelectrical storage means, switching means having a variable switchingrate for alternately and severally connecting said storage means acrosssaid load circuit means with a first and second polarity to establishthereacross an AC output voltage having an amplitude substantially equalto the voltage across said storage means, means for sensing thevolt-time integral of said AC output voltage, means for connecting saidsensing means in switching rate control relationship to said switchingmeans to control the phase displacement between the AC input voltage andsaid AC output voltage, said phase displacement varying as required toallow the flow of in-phase component of current from the AC source tosupply the power required by said load circuit means and to compensatefor the circuit losses.

13. In a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, phase-responsivebuffer means for developing a compensatory voltage in response to a flowof quadrature current therethrough and for choking off the flow ofexcess in-phase current therethrough when the phase displacement betweenthe input and output voltages is diminishing, load circuit means, meansfor connecting said phase-responsive buffer means and said load circuitmeans in series relationship across the source of AC input voltage,unidirectional electrical storage means, switching means having avariable switching rate fo r connecting said storage means in voltageclamping relationship to said load circuit means for both half cycles ofthe AC output voltage thereacross, said voltage clamping relationshipbeing characterized by the flow of a quadrature current between saidstorage means and said phase-responsive buffer means which establishesacross said bufier means a voltage equal to the instantaneous differencebetween the AC input voltage and said AC output voltage, means forsensing the volt-time integral of said AC output voltage, means forconnecting said sensing means in switching rate control relationship tosaid switching means to cause the switching rate of said switching meansto be substantially proportional to the amplitude of said AC outputvoltage, the phase relationship between the AC input voltage and ACinput current being controlled, in accordance with the phasedisplacement which is established between the AC input voltage and saidAC output voltage to assure the transfer of power from the AC source tosupply the power required by said load circuit means and the powerrequired to maintain a predetermined, substantially constant voltageacross said storage means.

14. In a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, a source ofunregulated AC voltage, a load, a pair of load terminals, means forconnecting said load across said load terminals, a switching circuitincluding a rectifying network and an inverting network, said invertingnetwork including off-on conducting means, each of said networks havingAC and DC tenninals, means for connecting said AC terminals to said loadterminals, unidirectional electrical storage means, means for connectingthe respective DC terminals of said rectifying and inverting networksacross said storage means, means for connecting the terminals of saidsource of AC voltage across said load terminals, phase-responsive buffermeans, means for connecting said phme-responsive bufi'er means in seriesrelationship with said unregulated source of AC voltage across said loadterminals, volt-time integral-sensing means, means for connecting saidvolt-time integral sensing means across said load terminals and meansfor connecting said volt-time integral sensing means in operative,controlling relationship to respective ofi-on conducting means in saidinverting network.

15. A voltage regulator circuit as set forth in claim 14 in which saidphase-responsive buffer means comprises inductance means.

16. A voltage regulator circuit as set forth in claim 15 in which saidunidirectional electrical storage means comprises capacitance means.

17. In a circuit for providing a regulated DC output voltage from anunregulated AC input voltage, in combination, phaseresponsive buffermeans, first and second AC terminal means, means for connecting saidphase-responsive buffer means in series with the source of AC inputvoltage across said AC terminal means, unidirectional electrical storagemeans, switching means for conducting charging current through saidstorage means when the voltage across said AC terminal means attempts torise above the voltage across said storage means and for conductingdischarging current from said storage means when the voltage across saidAC terminal means attempts to fall below the voltage across said storagemeans, means for connecting said storage means across said AC terminalmeans through said switching means, DC load circuit means, means forconnecting said load circuit means across said storage means, and meansfor controlling the discharging activity of said switching means inaccordance with the volt-time integral of the voltage between said ACterminal means.

18. In a circuit for providing regulated AC and DC output voltages froman unregulated AC input voltage, in combination, phase-responsive buffermeans for developing a compensatory voltage in response to a flow ofquadrature current herethrough and for choking off the flow of excessrn-phase current therethrough when the phase displacement between the ACinput and AC output voltages is diminishing, AC load circuit means,means for connecting said phase-responsive buffer means and said AC loadcircuit means in series relationship across the source of AC inputvoltage, unidirectional electrical storage means, switching means forconducting charging current through said storage means when theinstantaneous voltage across said AC load circuit means attempts to riseabove the voltage across said storage means and for conductingdischarging current from said storage means when the instantaneousvoltage across said AC load circuit means attempts to fall below thevoltage across said storage means, means for connecting said storagemeans in voltage clamping relationship across said AC load circuit meansthrough said switching means, DC load circuit means, means forconnecting said DC load circuit means across said storage means, meansfor controlling the discharging activity of said switching means inaccordance with the volt-time integral of the voltage across said loadcircuit means.

19. In a circuit for providing a regulated square wave output from anunregulated AC input, in combination, a source of unregulated AC power,a load, a pair of load terminals, means for connecting said load acrosssaid load terminals, a switching circuit, unidirectional electricalstorage means, means for connecting said switching circuit to said loadterminals, said switching circuit including a network for providing DCvoltage across said storage means from said source and a network forproviding DC voltage to said load terminals with periodic reversedpolarity in the switching mode, phase-responsive means, means forconnecting said phase-responsive means in buffering relationship withsaid source to said load terminals, sensing means, said sensing meansbeing adapted to switch in the conducting activity thereof upon apredetermined time accumulation of an electrical quantity impressedthereupon, means for connecting said sensing means in switching controlrelationship to said switching circuit.

1. In a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, phase responsivebuffer means for developing a compensatory voltage in response to a flowof quadrature current therethrough and for choking off the flow ofexcess in-phase current therethrough when the phase displacement betweenthe input and output voltages is diminishing, load circuit means, meansfor connecting said phase responsive buffer means and said load circuitmeans in series relationship across the source of AC input voltage, achargeable source of clamping voltage, means for conducting a chargingcurrent through said clamping voltage source when the instantaneous ACvoltage across said load circuit means is greater than the voltageacross said clamping voltage source, means for conducting a dischargingcurrent from said clamping voltage source when the voltage across saidclamping voltage source is greater than the instantaneous AC voltageacross said load circuit means, means for connecting said clampingvoltage source across said load circuit means through said chargingcurrent-conducting means, means for connecting said clamping voltagesource across said load circuit means through said dischargecurrent-conducting means and means for controlling the conductivity ofsaid discharge current-conducting means in accordance with the volt-timeintegral of the voltage across said load circuit means.
 2. An AC voltageregulator as set forth in claim 1 in which said chargeablevoltage-clamping source comprises a capacitor.
 3. In a circuit forproviding a regulated square wave output voltage from an unregulated ACinput voltage, in combination, phase-responsive buffer means fordeveloping a compensatory voltage in response to a flow of quadraturecurrent therethrough and for choking off the flow of excess in-phasecurrent therethrough when the phase displacement between the input andoutput voltages is diminishing, load circuit means, means for connectingsaid phase-responsive buffer means and said load circuit means in seriesrelationship across the source of AC input voltage, unidirectionalelectrical storage means, switching means for conducting chargingcurrent through said storage means when the instantaneous AC voltageacross said load circuit means attempts to rise above the voltage acrosssaid storage means and for conducting discharging current from saidstorage means when the instantaneous AC voltage across said load circuitmeans attempts to fall below the voltage across said storage means,means for connecting said storage means in voltage clamping relationshipacross said load circuit means through said switching means, means forcontrolling the discharging activity of said switching means inaccordance with the volt-time integral of the voltage across said loadcircuit means.
 4. A voltage regulator circuit as set forth in claim 3 inwhich said controlling means includes a transformer having center-tappedprimary winding means and secondary winding means, means for Connectingthe center tap of said primary winding means to one end of said loadcircuit means, saturable inductance means, resistance means, means forconnecting one end of said primary winding means to the other end ofsaid load circuit means through said saturable inductance means, meansfor connecting the other end of said primary winding means to said otherend of said load circuit means through said resistance means, means forconnecting said secondary winding means in control relationship to saidswitching means.
 5. A voltage regulator circuit as set forth in claim 3wherein said controlling means senses the output voltage during discretesensing periods, each of said discrete sensing periods being measured bya predetermined number of volt-seconds.
 6. In a circuit for providing aregulated square wave output voltage from an unregulated AC inputvoltage, in combination, phase-responsive buffer means for developing acompensatory voltage in response to a flow of quadrature currenttherethrough and for choking off the flow of excess in-phase currenttherethrough when the phase displacement between the input and outputvoltages is diminishing, load circuit means, means for connecting saidphase-responsive buffer means and said load circuit means in seriesrelationship across the source of AC input voltage, unidirectionalelectrical storage means, rectifying means having AC input means and DCoutput means, means for connecting the AC input means of said rectifyingmeans across said load circuit means, means for connecting said storagemeans across the DC output means of said rectifying means, invertingmeans having DC input means and AC output means, means for connectingsaid storage means to the DC input means of said inverting means, meansfor connecting the AC output means of said inverting means across saidload circuit means, means for sensing the volt-time integral of thevoltage across said load circuit means and means for connecting saidsensing means in switching control relationship to said inverting means.7. In a circuit for providing a regulated square wave output voltagefrom an unregulated AC input voltage, in combination, phase-responsivebuffer means for developing a compensatory voltage in response to a flowof quadrature current therethrough and for choking off the flow ofexcess in-phase current therethrough when the phase displacement betweenthe input and output voltages is diminishing, load circuit means, meansfor connecting said phase responsive buffer means and said load circuitmeans in series relationship across the source of AC input voltage,unidirectional electrical storage means, unidirectional conducting meansfor connecting said storage means in voltage-clamping relationshipacross said load circuit means when the instantaneous voltage acrosssaid load circuit means attempts to rise above the voltage of saidstorage means, controllable conducting means for connecting said storagemeans in voltage clamping relationship across said load circuit meanswhen the instantaneous voltage across said load circuit means attemptsto fall below the voltage of said storage means, means for controllingsaid controllable conducting means in accordance with the volt-timeintegral of the voltage across said load circuit means to preventchanges in the peak amplitude of the voltage across said load circuitmeans independently of proportional changes in the frequency thereof. 8.In a circuit for providing a regulated square wave output voltage froman unregulated AC input voltage, in combination, phase-responsive buffermeans for developing a compensatory voltage in response to a flow ofquadrature current therethrough and for choking off the flow of excessin-phase current therethrough through when the phase displacementbetween the output and input voltages is diminishing, load circuitmeans, means for connecting said phase-responsive buffer means and saidload circuit means in series relationship across the source of AC inputvoltage, unidirectional electrical storage means, a switching circuithaving DC input terminals and AC output terminals and being arranged toestablish a clamped AC voltage across said load circuit means duringboth half cycles of the AC voltage across said load circuit means, meansfor connecting the AC output terminals of said switching circuit acrosssaid load circuit means, means for connecting said storage means acrossthe DC input terminals of said switching circuit, said switching circuitbeing arranged to provide a bidirectional exchange of energy between theDC input terminals thereof and the AC output terminals thereof, meansfor controlling the rate of switching of said switching circuit inaccordance with the volt-time integral of the voltage across said loadcircuit means.
 9. An AC voltage regulator as set forth in claim 8 inwhich said switching circuit includes a plurality of controllableconducting means, said controllable conducting means being connected inan inverting bridge configuration having DC terminal means and ACterminal means, commutating inductance means, means for connecting saidcommutating inductance means between the DC terminal means of saidinverting bridge and the DC input terminals of said switching circuit,commutating capacitance means, means for connecting said commutatingcapacitance means between the AC terminals of said inverting bridge,means for connecting the AC terminals of said inverting bridge to the ACoutput terminals of said switching circuit, discharge inductance means,unidirectional conducting means for connecting said discharge inductancemeans between the DC terminals of said inverting bridge, a plurality ofunidirectional conducting means, said unidirectional conducting meansbeing connected in a rectifying bridge configuration having AC terminalmeans and DC terminal means, means for connecting the AC terminal meansof said rectifying bridge to the AC output terminals of said switchingcircuit and means for connecting the DC terminal means of saidrectifying bridge to the DC input terminals of said switching circuit.10. An AC voltage regulator as set forth in claim 8 in which saidunidirectional electrical storage means comprises a capacitor.
 11. In acircuit for providing a regulated square wave output voltage from anunregulated AC input voltage, in combination, phase-responsive buffermeans for developing a compensatory voltage in response to a flow ofquadrature current therethrough and for choking off the flow of excessin-phase current therethrough when the phase displacement between theinput and output voltages is diminishing, load circuit means, means forconnecting said phase-responsive buffer means and said load circuitmeans in series relationship across the source of AC input voltage, achargeable clamping voltage source, first unidirectional conductingmeans for conducting charging current through said clamping voltagesource when the voltage across said load circuit means has a firstpolarity, second unidirectional conducting means for conducting chargingcurrent through said clamping voltage source when the voltage acrosssaid load circuit means has a second polarity, first controllableconducting means for conducting discharge current from said clampingvoltage source when the voltage across said load circuit means has afirst polarity, second controllable conducting means for conductingdischarge current from said clamping voltage source when the voltageacross said load circuit means has a second polarity, means forconnecting said clamping voltage source across said load circuit meansthrough said conducting means, means for sensing the volt-time integralof the voltage across said load circuit means, means for connecting saidsensing means in conduction control relationship to said first andsecond controllable conducting means, said sensing means being adaptedto reverse the conductive states of said controllable conducting meanseAch time the volt-time integral of the voltage across said load circuitmeans attains a volt-second value equal to the product of the amplitudeof the desired square wave voltage across said load circuit means and atime equal to one-half of period of the AC input voltage.
 12. In acircuit for providing a regulated square wave output voltage from anunregulated AC input voltage, in combination, phase-responsive buffermeans for developing a compensatory voltage in response to a flow ofquadrature current therethrough and for choking off the flow of excessin-phase current therethrough when the phase displacement between theinput and output voltages is diminishing, load circuit means, means forconnecting said phase-responsive buffer means and said load circuitmeans in series across the source of AC input voltage, unidirectionalelectrical storage means, switching means having a variable switchingrate for alternately and severally connecting said storage means acrosssaid load circuit means with a first and second polarity to establishthereacross an AC output voltage having an amplitude substantially equalto the voltage across said storage means, means for sensing thevolt-time integral of said AC output voltage, means for connecting saidsensing means in switching rate control relationship to said switchingmeans to control the phase displacement between the AC input voltage andsaid AC output voltage, said phase displacement varying as required toallow the flow of in-phase component of current from the AC source tosupply the power required by said load circuit means and to compensatefor the circuit losses.
 13. In a circuit for providing a regulatedsquare wave output voltage from an unregulated AC input voltage, incombination, phase-responsive buffer means for developing a compensatoryvoltage in response to a flow of quadrature current therethrough and forchoking off the flow of excess in-phase current therethrough when thephase displacement between the input and output voltages is diminishing,load circuit means, means for connecting said phase-responsive buffermeans and said load circuit means in series relationship across thesource of AC input voltage, unidirectional electrical storage means,switching means having a variable switching rate for connecting saidstorage means in voltage clamping relationship to said load circuitmeans for both half cycles of the AC output voltage thereacross, saidvoltage clamping relationship being characterized by the flow of aquadrature current between said storage means and said phase-responsivebuffer means which establishes across said buffer means a voltage equalto the instantaneous difference between the AC input voltage and said ACoutput voltage, means for sensing the volt-time integral of said ACoutput voltage, means for connecting said sensing means in switchingrate control relationship to said switching means to cause the switchingrate of said switching means to be substantially proportional to theamplitude of said AC output voltage, the phase relationship between theAC input voltage and AC input current being controlled, in accordancewith the phase displacement which is established between the AC inputvoltage and said AC output voltage to assure the transfer of power fromthe AC source to supply the power required by said load circuit meansand the power required to maintain a predetermined, substantiallyconstant voltage across said storage means.
 14. In a circuit forproviding a regulated square wave output voltage from an unregulated ACinput voltage, in combination, a source of unregulated AC voltage, aload, a pair of load terminals, means for connecting said load acrosssaid load terminals, a switching circuit including a rectifying networkand an inverting network, said inverting network including off-onconducting means, each of said networks having AC and DC terminals,means for connecting said AC terminals to said load terminals,unidirectionAl electrical storage means, means for connecting therespective DC terminals of said rectifying and inverting networks acrosssaid storage means, means for connecting the terminals of said source ofAC voltage across said load terminals, phase-responsive buffer means,means for connecting said phase-responsive buffer means in seriesrelationship with said unregulated source of AC voltage across said loadterminals, volt-time integral-sensing means, means for connecting saidvolt-time integral sensing means across said load terminals and meansfor connecting said volt-time integral sensing means in operative,controlling relationship to respective off-on conducting means in saidinverting network.
 15. A voltage regulator circuit as set forth in claim14 in which said phase-responsive buffer means comprises inductancemeans.
 16. A voltage regulator circuit as set forth in claim 15 in whichsaid unidirectional electrical storage means comprises capacitancemeans.
 17. In a circuit for providing a regulated DC output voltage froman unregulated AC input voltage, in combination, phase-responsive buffermeans, first and second AC terminal means, means for connecting saidphase-responsive buffer means in series with the source of AC inputvoltage across said AC terminal means, unidirectional electrical storagemeans, switching means for conducting charging current through saidstorage means when the voltage across said AC terminal means attempts torise above the voltage across said storage means and for conductingdischarging current from said storage means when the voltage across saidAC terminal means attempts to fall below the voltage across said storagemeans, means for connecting said storage means across said AC terminalmeans through said switching means, DC load circuit means, means forconnecting said load circuit means across said storage means, and meansfor controlling the discharging activity of said switching means inaccordance with the volt-time integral of the voltage between said ACterminal means.
 18. In a circuit for providing regulated AC and DCoutput voltages from an unregulated AC input voltage, in combination,phase-responsive buffer means for developing a compensatory voltage inresponse to a flow of quadrature current therethrough and for chokingoff the flow of excess in-phase current therethrough when the phasedisplacement between the AC input and AC output voltages is diminishing,AC load circuit means, means for connecting said phase-responsive buffermeans and said AC load circuit means in series relationship across thesource of AC input voltage, unidirectional electrical storage means,switching means for conducting charging current through said storagemeans when the instantaneous voltage across said AC load circuit meansattempts to rise above the voltage across said storage means and forconducting discharging current from said storage means when theinstantaneous voltage across said AC load circuit means attempts to fallbelow the voltage across said storage means, means for connecting saidstorage means in voltage clamping relationship across said AC loadcircuit means through said switching means, DC load circuit means, meansfor connecting said DC load circuit means across said storage means,means for controlling the discharging activity of said switching meansin accordance with the volt-time integral of the voltage across saidload circuit means.
 19. In a circuit for providing a regulated squarewave output from an unregulated AC input, in combination, a source ofunregulated AC power, a load, a pair of load terminals, means forconnecting said load across said load terminals, a switching circuit,unidirectional electrical storage means, means for connecting saidswitching circuit to said load terminals, said switching circuitincluding a network for providing DC voltage across said storage meansfrom said source and a network for providing DC voltage to said loaDterminals with periodic reversed polarity in the switching mode,phase-responsive means, means for connecting said phase-responsive meansin buffering relationship with said source to said load terminals,sensing means, said sensing means being adapted to switch in theconducting activity thereof upon a predetermined time accumulation of anelectrical quantity impressed thereupon, means for connecting saidsensing means in switching control relationship to said switchingcircuit.